Verified Mercor opportunity
Join a leading AI lab's cutting-edge GenAI team to be at the core of the AI revolution, where your expertise fuels the development of the most advanced AI models. — 1. Overview — A leading AI lab is growing a team of chip design and verification engineers to help shape how its models understand real hardware engineering work. If you've spent your career chasing down a bug across multiple blocks, architected a piece of RTL from scratch, or fought a design through timing and coverage closure, we want to hear from you — the goal is to bring that same kind of real-world judgment into the problems these models are trained and tested on. — We're building out this team across experience levels, from PhD students and new grads just starting out to senior engineers who've taken silicon all the way to tapeout. There's no single "right" background here — what matters is that you've actually done the work, not just studied it. — This is a part-time W-2 employment position with Cincinnatus LLC, with the opportunity to be placed at a leading AI lab as part of their extended workforce. This role is fully remote within the United States, at roughly 20–40 hours per week depending on your availability. — 2. Key Responsibilities • Design and write up realistic chip engineering problems drawn from your own experience — the kind of design, debugging, or verification work you've actually done, not textbook exercises. • Build out full solutions to go with them: reference RTL, testbenches, and supporting materials, using SystemVerilog/Verilog and the tools you already know. • Run your problems against an AI model, see where it holds up and where it doesn't, and help explain why. • Work alongside other engineers on the team to keep everyone's work at a consistent bar of rigor and difficulty. — 3. Core Qualifications • Hands-on ASIC/SoC design and/or functional verification experience, ideally with exposure to production silicon that's been taped out. • Strong fluency in SystemVerilog/Verilog. • Comfortable working in industry toolchains (e.g., Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, Verdi) and/or their open-source counterparts (Icarus Verilog, Verilator, CocoTB, Yosys, OpenROAD). • Solid grasp of subsystem/SoC-level concerns: interface protocols, handshaking and backpressure, multiple clock domains, and multi-module dataflow. • Real depth in at least one of the following: RTL design & microarchitecture; IP integration, bring-up & system configuration (NoC, PCIe, DDR, ARM/AXI); functional verification (UVM, SVA, CocoTB; testbench architecture); formal verification & coverage closure; PPA, timing, and synthesis optimization; analog/mixed-signal design verification; or specification authoring, comprehension & Q&A. • Able to commit 20–40 hours per week, with confirmed availability and no scheduling conflicts. • Past experience in AI training, model evaluation, or data annotation is a plus. • Strong written communication and comfortable working independently. — About Cincinnatus LLC — Cincinnatus LLC is an enterprise staffing company that partners with leading technology companies to source and employ highly skilled professionals for contingent and contract-based opportunities. Cincinnatus serves as the employer of record for these engagements, providing W-2 employment, payroll, benefits, and compliance, while placing employees directly within client teams to work on high-impact initiatives. — Roles hired through Cincinnatus are not project-based or freelance engagements. They are structured, role-based positions that typically involve part-time or full-time commitments, close collaboration with a client's internal teams, and integration into standard enterprise workflows. — Cincinnatus is a legal entity separate from Mercor. While opportunities may be discovered through Mercor's platform, employment, onboarding, payroll, and benefits for these roles are administered by Cincinnatus LLC. — Equal Employment Opportunity — Cincinnatus is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or any other legally protected characteristic. — Cincinnatus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans throughout the job application process.